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R8C2K датащи(PDF) 279 Page - Renesas Technology Corp

номер детали R8C2K
подробное описание детали  RENESAS MCU R8C FAMILY / R8C/2x SERIES
PDF  471 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R8C2K датащи(HTML) 279 Page - Renesas Technology Corp

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R8C/2K Group, R8C/2L Group
16. Timers
Rev.1.10
Dec 21, 2007
Page 262 of 450
REJ09B0406-0110
Figure 16.102 TRDFCR Register in PWM Mode
Timer RD Function Control Register
Symbol
Address
After Reset
TRDFCR
013Ah
10000000b
Bit Symbol
Bit Name
Function
RW
NOTES:
1.
2. When bits CMD1 to CMD0 are set to 00b (timer mode, PWM mode, or PWM3 mode), the setting of the PWM3 bit is
enabled.
STCLK
External clock input select bit
0 : External clock input disabled
1 : External clock input enabled
RW
RW
PWM3
RW
ADTRG
ADEG
A/D trigger edge select bit
(in complementary PWM mode)
This bit is disabled in PWM mode.
RW
PWM3 mode select bit(2)
Set this bit to 1 (other than PWM3 mode) in
PWM mode.
Normal-phase output level select Bit
(in reset synchronous PWM mode or
complementary PWM mode)
This bit is disabled in PWM mode.
Set bits CMD1 to CMD0 w hen both the TSTART0 and TSTART1 bits are set to 0 (count stops).
OLS0
RW
RW
Counter-phase output level select bit
(in reset synchronous PWM mode or
complementary PWM mode)
This bit is disabled in PWM mode.
A/D trigger enable bit
(in complementary PWM mode)
This bit is disabled in PWM mode.
RW
CMD1
RW
Combination mode select bits(1)
Set to 00b (timer mode, PWM mode, or
PWM3 mode) in PWM mode.
CMD0
b7 b6 b5 b4
1
b3 b2
OLS1
b1 b0
00



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