R8C2K datasheet(112/471 Pages) RENESAS

112 / 471 page

R8C/2K Group, R8C/2L Group

10. Clock Generation Circuit

Rev.1.10

Dec 21, 2007

Page 95 of 450

REJ09B0406-0110

10.6

Notes on Clock Generation Circuit

10.6.1

Stop Mode

When entering stop mode, set the FMR01 bit in the FMR0 register to 0 (CPU rewrite mode disabled) and the

CM10 bit in the CM1 register to 1 (stop mode). An instruction queue pre-reads 4 bytes from the instruction

which sets the CM10 bit to 1 (stop mode) and the program stops.

Insert at least 4 NOP instructions following the JMP.B instruction after the instruction which sets the CM10 bit

to 1.

• Program example to enter stop mode

BCLR

1,FMR0

; CPU rewrite mode disabled

BSET

0,PRCR

; Protect disabled

FSET

; Enable interrupt

BSET

0,CM1

; Stop mode

JMP.B

LABEL_001

LABEL_001 :

NOP

10.6.2

Wait Mode

When entering wait mode, set the FMR01 bit in the FMR0 register to 0 (CPU rewrite mode disabled) and

execute the WAIT instruction. An instruction queue pre-reads 4 bytes from the WAIT instruction and the

program stops. Insert at least 4 NOP instructions after the WAIT instruction.

• Program example to execute the WAIT instruction

BCLR

1,FMR0

; CPU rewrite mode disabled

FSET

; Enable interrupt

WAIT

; Wait mode

NOP

10.6.3

Oscillation Stop Detection Function

Since the oscillation stop detection function cannot be used if the XIN clock frequency is 2 MHz or below, set

bits OCD1 to OCD0 to 00b.

10.6.4

Oscillation Circuit Constants

Ask the manufacturer of the oscillator to specify the best oscillation circuit constants for your system.

To use this MCU with supply voltage below VCC = 2.7 V, it is recommended to set the CM11 bit in the CM1

feedback resistor to the chip externally.

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