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R8C2K датащи(PDF) 106 Page - Renesas Technology Corp |
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R8C2K датащи(HTML) 106 Page - Renesas Technology Corp |
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106 / 471 page ![]() R8C/2K Group, R8C/2L Group 10. Clock Generation Circuit Rev.1.10 Dec 21, 2007 Page 89 of 450 REJ09B0406-0110 10.4.3 Stop Mode Since the oscillator circuits stop in stop mode, the CPU clock and peripheral function clock stop and the CPU and peripheral functions that use these clocks stop operating. The least power required to operate the MCU is in stop mode. If the voltage applied to the VCC pin is VRAM or more, the contents of internal RAM is maintained. The peripheral functions clocked by external signals continue operating. Table 10.4 lists Interrupts to Exit Stop Mode and Usage Conditions. 10.4.3.1 Entering Stop Mode The MCU enters stop mode when the CM10 bit in the CM1 register is set to 1 (all clocks stop). At the same time, the CM06 bit in the CM0 register is set to 1 (divide-by-8 mode) and the CM15 bit in the CM1 register is set to 1 (XIN clock oscillator circuit drive capacity high). When using stop mode, set bits OCD1 to OCD0 to 00b before entering stop mode. 10.4.3.2 Pin Status in Stop Mode The status before wait mode was entered is maintained. However, when the CM13 bit in the CM1 register is set to 1 (XIN-XOUT pins), the XOUT(P4_7) pin is held “H”. When the CM13 bit is set to 0 (input ports P4_6 and P4_7), the P4_7(XOUT pin) is held in input status. Table 10.4 Interrupts to Exit Stop Mode and Usage Conditions Interrupt Usage Conditions Key input interrupt − INT0, INT1, INT3 interrupt Can be used if there is no filter Timer RA interrupt When there is no filter and external pulse is counted in event counter mode Serial interface interrupt When external clock is selected Voltage monitor 1 interrupt Usable in digital filter disabled mode (VW1C1 bit in VW1C register is set to 1) Voltage monitor 2 interrupt Usable in digital filter disabled mode (VW2C1 bit in VW2C register is set to 1) |
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