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R8C2K датащи(PDF) 350 Page - Renesas Technology Corp

номер детали R8C2K
подробное описание детали  RENESAS MCU R8C FAMILY / R8C/2x SERIES
PDF  471 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R8C2K датащи(HTML) 350 Page - Renesas Technology Corp

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R8C/2K Group, R8C/2L Group
18. Hardware LIN
Rev.1.10
Dec 21, 2007
Page 333 of 450
REJ09B0406-0110
18. Hardware LIN
The hardware LIN performs LIN communication in cooperation with timer RA and UART0.
18.1
Features
The hardware LIN has the features listed below.
Figure 18.1 shows a Block Diagram of Hardware LIN.
Master mode
• Generates Synch Break
• Detects bus collision
Slave mode
• Detects Synch Break
• Measures Synch Field
• Controls Synch Break and Synch Field signal inputs to UART0
• Detects bus collision
NOTE:
1.The WakeUp function is detected by INT1.
Figure 18.1
Block Diagram of Hardware LIN
Timer RA
UART0
Interrupt
control
circuit
Bus collision
detection
circuit
Synch Field
control
circuit
RXD0 input
control
circuit
RXD0 pin
TXD0 pin
LSTART bit
SBE bit
LINE bit
Timer RA
interrupt
TIOSEL = 0
Hardware LIN
TIOSEL = 1
RXD data
Timer RA
underflow signal
BCIE, SBIE,
and SFIE bits
UART0 transfer clock
UART0 TE bit
Timer RA output pulse
UART0 TXD data
MST bit
LINE, MST, SBE, LSTART, BCIE, SBIE, SFIE: Bits in LINCR register
TIOSEL: Bit in TRAIOC register
TE: Bit in U0C1 register



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