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STLC5466 датащи(PDF) 124 Page - STMicroelectronics

номер детали STLC5466
подробное описание детали  64 CHANNEL-MULTI HDLC WITH N X 64KB/S SWITCHING MATRIX ASSOCIATED
PDF  130 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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STLC5466 датащи(HTML) 124 Page - STMicroelectronics

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4.7
68000; MOD0 = 0, MOD1 = 0, MOD2 = 1
Figure 4-14: 68000 read cycle
tx
Parameter
T min
T max
Unit
t1
Delay NDTACK /NCS0/1 (if t3>t1), (30 pF)
Delay when immediate access
0
98
ns
ns
t2
Hold time Chip Select / NLDS-NUDS
0
ns
t3
Delay NDTACK /NLDS-NUDS falling edge (if t1>t3), (30 pF)
Delay when immediate access
0
98
ns
t4
Delay NDTACK /NLDS-NUDS rising edge
0
20
ns
t5
Set up time Address and R/W / last NLDS-NUDS or NCS
0
ns
t6
Hold time Address and R/W / NLDS-NUDS
0
ns
t7
Data valid before NDTACK falling edge (30 pF)
0
15
ns
t8
Data bus at high impedance after NLDS-NUDS rising edge (30 pF)
015
ns
t7
t5
t6
t8
t3
t1
t2
t4
NCS0/1
NDTACK
NAS/ALE
SIZE0/NLDS
SIZE1/NUDS
A1/23
R/W / NWR
D0/15
A1/23



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