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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST92F124 датащи(PDF) 407 Page - STMicroelectronics |
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ST92F124 датащи(HTML) 407 Page - STMicroelectronics |
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407 / 426 page  407/426 ST92F124/F150/F250 - KNOWN LIMITATIONS 13 KNOWN LIMITATIONS Limitations described in this section apply to all sil- icon revisions. Additional limitations exist on spe- cific silicon revisions identified by the following trace codes: – Gxxxxxxxx1 (ST92F124) – AxxxxxxxxZ (ST92F150) – AxxxxxxxxY (ST92F150) – AxxxxxxxxA (ST92F250) Please contact your nearest sales office for further information. 13.1 ST92F124/F150/F250 KNOWN LIMITATIONS 13.1.1 FLASH ERASE SUSPEND LIMITATIONS 13.1.1.1 Description In normal operation, the FSUSP bit (bit 2 in the FCR register) must be set to suspend the current Sector Erase operation in Flash memory in order to access a sector not being erased. The Flash sector erase operation is done in 3 different steps: 1. Program all addresses to 0 on selected sectors 2. Erase and erase verify 3. Reprogramming If the erase suspend is performed during Steps 1 and 2, the flash works correctly. If the erase sus- pend is performed during Step 3, the PGER bit (bit 6 in the FESR1 register) is set although no pro- gram error occurred. 13.1.1.2 Workaround After a Sector Erase suspend operation, the soft- ware must check the status register to detect if an erase error occurred (the corresponding sector must be discarded). Then the software must reset the FEERR bit. This automatically resets the flash status register. Whatever the state of the PGER bit at the end of the erase operation, it will not impact the applica- tion and an erase error is still detected. 1 |
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