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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST723217 датащи(PDF) 139 Page - STMicroelectronics |
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ST723217 датащи(HTML) 139 Page - STMicroelectronics |
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139 / 185 page  ST72321 139/185 OPERATING CONDITIONS (Cont’d) 12.3.2 Operating Conditions with Low Voltage Detector (LVD) Subject to general operating conditions for VDD, fCPU, and TA. Notes: 1. Data based on characterization results, not tested in production. 2. When VtPOR is faster than 100 µs/V, the Reset signal is released after a delay of max. 42µs after VDD crosses the VIT+(LVD) threshold. 3. If the medium or low thresholds are selected, the detection may occur outside the specified operating voltage range. Below 3.8V, device operation is not guaranteed. Symbol Parameter Conditions Min Typ Max Unit VIT+(LVD) Reset release threshold (VDD rise) VD level = High in option byte 4.0 1) 4.2 4.5 V VD level = Med. in option byte3) VD level = Low in option byte3) 3.55 1) 2.95 1) 3.75 3.15 4.01) 3.351) VIT-(LVD) Reset generation threshold (VDD fall) VD level = High in option byte 3.8 4.0 4.25 1) VD level = Med. in option byte3) VD level = Low in option byte3) 3.351) 2.81) 3.55 3.0 3.751) 3.15 1) Vhys(LVD) LVD voltage threshold hysteresis 1) VIT+(LVD)-VIT-(LVD) 150 200 250 mV VtPOR VDD rise time 1)2) 6 ∝ µs/V tg(VDD) VDD glitches filtered (not detected) by LVD 1) 40 ns |
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