ST72260G datasheet(168/171 Pages) STMICROELECTRONICS

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ERRATA SHEET

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19.9 HALT MODE POWER CONSUMPTION WITH ADC ON

If the A/D converter is being used when Halt mode is entered, the power consumption in Halt

Mode may exceed the maximum specified in the datasheet.

Workaround

Switch off the ADC by software (ADON=0) before executing a HALT instruction.

19.10 ACTIVE HALT WAKE-UP BY EXTERNAL INTERRUPT

External interrupts are not able to wake-up the MCU from Active Halt mode. The MCU can

only exit from Active Halt mode by means of an MCC/RTC interrupt or a reset.

Workaround

Use WAIT mode if external interrupt capability is required in low power mode.

19.11 A/D CONVERTER ACCURACY FOR FIRST CONVERSION

When the ADC is enabled after being powered down (for example when waking up from

HALT, ACTIVE-HALT or setting the ADON bit in the ADCCSR register), the first conversion

(8-bit or 10-bit) accuracy does not meet the accuracy specified in the data sheet.

Workaround

In order to have the accuracy specified in the datasheet, the first conversion after a ADC

switch-on has to be ignored.

19.12 NEGATIVE INJECTION IMPACT ON ADC ACCURACY

Injecting a negative current on an analog input pins significantly reduces the accuracy of the

AD Converter. Whenever necessary, the negative injection should be prevented by the addi-

tion of a Schottky diode between the concerned I/Os and ground.

Injecting a negative current on digital input pins degrades ADC accuracy especially if per-

formed on a pin close to ADC channel in use.

19.13 ADC CONVERSION SPURIOUS RESULTS

Spurious conversions occur with a rate lower than 50 per million. Such conversions happen

when the measured voltage is just between 2 consecutive digital values.

Workaround

A software filter should be implemented to remove erratic conversion results whenever they

may cause unwanted consequences.

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