ST72260G datasheet(141/171 Pages) STMICROELECTRONICS

141 / 171 page

ST72260G, ST72262G, ST72264G

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13.8 I/O PORT PIN CHARACTERISTICS

13.8.1 General Characteristics

TA = -40 to +85°C unless otherwise specified

Notes:

1. Data based on characterization results, not tested in production.

2. When the current limitation is not possible, the VIN maximum must be respected, otherwise refer to IINJ(PIN) specifica-

tion. A positive injection is induced by VIN>VDD while a negative injection is induced by VIN<VSS. Refer to Section 13.2.2

on page 123 for more details.

3. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for

example or an external pull-up or pull-down resistor (see Figure 82). Data based on design simulation and/or technology

characteristics, not tested in production.

4. The RPU pull-up equivalent resistor is based on a resistive transistor (corresponding IPU current characteristics de-

scribed in Figure 83).

5. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external

interrupt source.

Figure 82. Two typical Applications with unused I/O Pin

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

Input low level voltage1)

0.3xVDD

VIH

Input high level voltage1)

0.7xVDD

Vhys

Schmitt trigger voltage hysteresis 1)

400

IINJ(PIN)

Injected Current on an I/O pin

VDD=5V

±4

ΣI

INJ(PIN)

2) Total injected current (sum of all I/O

and control pins)

±25

Input leakage current

VSS≤VIN≤VDD

±1

µA

Static current consumption

Floating input mode3)

200

RPU

Weak pull-up equivalent resistor 4)

VIN=VSS

VDD=5V

250

Ω

VDD=3V

1701)

190

2301)

CIO

I/O pin capacitance

tf(IO)out

Output high to low level fall time 1)

CL=50pF

Between 10% and 90%

tr(IO)out

Output low to high level rise time 1)

tw(IT)in

External interrupt pulse time5)

1tCPU

10k

Ω

UNUSED I/O PORT

ST7XXX

10k

Ω

UNUSED I/O PORT

ST7XXX

VDD

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