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ST10F269 датащи(PDF) 105 Page - STMicroelectronics |
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ST10F269 датащи(HTML) 105 Page - STMicroelectronics |
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105 / 160 page ![]() ST10F269 105/160 17 - WATCHDOG TIMER The Watchdog Timer is a fail-safe mechanism which prevents the microcontroller from malfunctioning for long periods of time. The Watchdog Timer is always enabled after a reset of the chip and can only be disabled in the time interval until the EINIT (end of initialization) instruction has been executed. Therefore, the chip start-up procedure is always monitored. The software must be designed to service the watchdog timer before it overflows. If, due to hardware or software related failures, the software fails to do so, the watchdog timer overflows and generates an internal hardware reset. It pulls the RSTOUT pin low in order to allow external hardware components to be reset. Each of the different reset sources is indicated in the WDTCON register. The indicated bits are cleared with the EINIT instruction. The origine of the reset can be identified during the initialization phase. WDTCON (FFAEh / D7h) SFR Reset Value: 00xxh Notes: 1. More than one reset indication flag may be set. After EINIT, all flags are cleared. 2. Power-on is detected when a rising edge from VDD = 0 V to VDD > 2.0 V is recognized on the internal 3.3V supply. 3. These bits cannot be directly modified by software. 15 14 13 12 11 10 9 8 765 4321 0 WDTREL - - PONR LHWR SHWR SWR WDTR WDTIN RW HR HR HR HR HR RW WDTIN Watchdog Timer Input Frequency Selection ‘0’: Input Frequency is fCPU/2. ‘1’: Input Frequency is fCPU/128. WDTR1-3 Watchdog Timer Reset Indication Flag Set by the watchdog timer on an overflow. Cleared by a hardware reset or by the SRVWDT instruction. SWR1-3 Software Reset Indication Flag Set by the SRST execution. Cleared by the EINIT instruction. SHWR1-3 Short Hardware Reset Indication Flag Set by the input RSTIN. Cleared by the EINIT instruction. LHWR1-3 Long Hardware Reset Indication Flag Set by the input RSTIN. Cleared by the EINIT instruction. PONR1- 2-3 Power-On (Asynchronous) Reset Indication Flag Set by the input RSTIN if a power-on condition has been detected. Cleared by the EINIT instruction. |
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