DAC39RF10 datasheet(212/232 Pages) TI2

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2. Remember that approximately 20dB/decade noise suppression is gained for each additional filtering stage.

3. Decouple for both high and low frequencies, which might require multiple capacitor values.

4. Series ferrite beads and feed through capacitors are commonly used at the power plain entry point, and can

be used for addition power domain isolation. This should be done for each individual supply voltage on the

system board whether it comes from an LDO or a switching regulator.

5. For added capacitance, use tightly stacked power and ground plane pairs (≤4 mil spacing) this adds inherent

high-frequency (>500MHz) decoupling to the PCB design.

6. Keep supplies away from sensitive analog circuitry such as the front-end RF stage of the DAC and high-

speed clocking and digital circuits if possible.

7. Keep power domains that demand higher currents, near the top of the stack-up or layer that has power plain

entry point. This minimizes the overall loop inductance.

8. Any open or voided areas on power plane, fill with ground to provide additional isolation and shielding.

9. Keep a 20 to 25 mil gap between all adjacent power and/or ground plane fills. This helps eliminate all gap

coupling between adjacent power domains and/or grounds within the same layer.

10. Some switcher regulator circuitry/components could be located on the opposite side of the PCB for added

isolation.

11. Follow the IC manufacture recommendations; if the recommendations are not directly stated in an

application note or data sheet, then study the evaluation board. These are great tools from which to

learn. Applying the points listed above can help provide a solid power supply design yielding data sheet

performance in many applications.

Each application has different tolerances for noise on the supply voltage, so understanding these trades is best

described in the following two application notes for more details:

• Clutter-free power supplies for RF converters in radar applications (Part 1)

• Clutter-free power supplies for RF converters in radar applications (Part 2)

Also refer to Figure 9-29 through Figure 9-32 to illustrate the one power supply layout and stack-up approach.

9.3.1 Power Up and Down Sequence

At power up, ramp up the power supplies in the following order:

1. Ramp 1.8V supplies, including the bias voltage for DACOUTA+/- and DACOUTB+/-

2. Ramp -1.8V supplies

3. Ramp 1V supplies

Use the reverse order for ramp down.

1. Ramp down 1V supplies

2. Ramp down -1.8V supplies

3. Ramp down 1.8V supplies, including the bias voltage for DACOUTA+/- and DACOUTB+/-

DAC39RF10-SP, DAC39RF10-SEP

DAC39RFS10-SP, DAC39RFS10-SEP

SBAS932A – MARCH 2024 – REVISED FEBRUARY 2026

www.ti.com

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DAC39RF10 датащи(PDF) 212 Page - Texas Instruments