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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST7FOXK2 датащи(PDF) 209 Page - STMicroelectronics |
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ST7FOXK2 датащи(HTML) 209 Page - STMicroelectronics |
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209 / 226 page  ST7FOXF1, ST7FOXK1, ST7FOXK2 Electrical characteristics 209/226 12.11 10-bit ADC characteristics Subject to general operating condition for VDD, fOSC, and TA unless otherwise specified. Figure 91. Typical application with ADC Table 90. ADC characteristics Symbol Parameter Conditions Min Typ(1) Max Unit fADC ADC clock frequency 4 MHz VAIN Conversion voltage range VSSA VDDA V RAIN External input resistor VDD = 5 V, fADC = 4 MHz 8k(2) Ω 4.5 V ≤ V DD ≤ 5.5 V, fADC = 2 MHz 10k(2) CADC Internal sample and hold capacitor 6pF tSTAB Stabilization time after ADC enable f CPU = 8 MHz, fADC = 4 MHz 0(3) µs tADC Conversion time (Sample+Hold) 3.5 - Sample capacitor loading time - Hold conversion time 4 10 1/fADC 1. Unless otherwise specified, typical data are based on TA = 25 °C and VDD-VSS = 5 V. They are given only as design guidelines and are not tested. 2. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than the maximum value). Data guaranteed by Design, not tested in production. 3. The stabilization time of the A/D converter is masked by the first tLOAD. The first conversion after the enable is then always valid. AINx ST7xxx VDD IL ±1 µA VT 0.6 V VT 0.6 V CADC VAIN RAIN 10-Bit A/D Conversion |
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