STM32L433CB datasheet(148/227 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32L433xx

148/19

DS11449 Rev 7

All I/Os are CMOS- and TTL-compliant (no software configuration required). Their

characteristics cover more than the strict CMOS-technology or TTL parameters. The

coverage of these requirements is shown in Figure 28 for standard I/Os, and in Figure 28 for

5 V tolerant I/Os.

Figure 28. I/O input characteristics

Output driving current

The GPIOs (general purpose input/outputs) can sink or source up to ±8 mA, and sink or

source up to ± 20 mA (with a relaxed VOL/VOH).

RPD

Weak pull-down

equivalent resistor(8)

VIN = VDDIOx

kΩ

CIO

I/O pin capacitance

1. Refer to Figure 28: I/O input characteristics.

2. Tested in production.

3. Guaranteed by design.

4. This value represents the pad leakage of the IO itself. The total product pad leakage is provided by this formula:

ITotal_Ileak_max = 10 µA + [number of IOs where VIN is applied on the pad] ₓ Ilkg(Max).

5. All FT_xx GPIOs except FT_u and PC3 I/Os.

6. Max(VDDXXX) is the maximum value of all the I/O supplies.

7. To sustain a voltage higher than Min(VDD, VDDA, VDDUSB, VLCD) +0.3 V, the internal Pull-up and Pull-Down resistors must

be disabled.

8. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This

PMOS/NMOS contribution to the series resistance is minimal (~10% order).

Table 70. I/O static characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

MSv37613V1

Tested

in production

requirement

Vih

min

= 0.7xV

DDIOx

Based

on simul

ation

Vih min

= 0.61xV

DDIOx

+0.05

for 1.08

<VDDIO

x<1.62

or 0.49xV

DDIOx

+0.2

6 for

VDDIOx

>1.6

Base

d on simulation

Vil max

=0.4

3xVDDIOx

-0.1 for

1.08<V

DDIOx

<1.62

or 0.

39xVD

DIOx

-0.06

for VDDIOx

>1.62

Tested

in production

CMOS

requirement

Vil max

= 0.3xVdd

TTL requirement Vih min = 2V

TTL requirement Vil max = 0.8V

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