L9908 datasheet(105/152 Pages) STMICROELECTRONICS

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5.20.1

Protocol description

L9908 implements a SPI-server interface based on a 32-bit protocol.

This server interface then always requires a SPI-controller device (ex. uC) which is responsible for generating the

selection and the synchronization signals (NCS, SCLK) necessary to the data transmission.

The interface supports star mode connections along with other SPI-server devices while it does not support daisy-

chain mode connections (input data are not transmitted directly to the output port).

Figure 80. SPI connection modes "a" star connection (supported) "b" daisy-chain connection (not

supported)

The data exchange has an out-of-frame structure: each MISO output frame is related to the previously transmitted

MOSI frame.

SPI-controller can directly verify if the previous frame has been received and processed correctly.

NCS pin (chip select) is used by the SPI-controller to enable/disable the data communication. Communication

starts with the NCS falling edge while is stopped with the NCS rising edge. As long as NCS is high any transition

at the SCLK and SDI pins (including glitches) is ignored and SDO is forced into a high-Z state.

SCLK pin (Synchronous serial clock) is used by the SPI-controller to synchronize the data communication. Each

correct communication shall contain 32 SCLK pulses.

At each SCLK rising edge SDI and SDO data are updated respectively by SPI-controller and L9908 (shift), at

each SCLK falling edge SDI and SDO data are sampled respectively by L9908 and SPI-controller (capture).

SCLK has to be low during the NCS transition.

SDI pin (Serial data input) is used by the SPI-controller to deliver the 32-bit input frame to L9908. In MOSI

communication, the first bit expected is MSB while the last is LSB.

SDO pin (Serial data output) is used by L9908 to transmit the 32-bit data output. In MISO communication, the first

bit transmitted is MSB while the last is LSB.

Figure 81. SPI timing diagram

Table 102. SPI timing characteristics

Symbol

Parameter

Test condition

Min Typ Max Unit

SPI_fclk

Transfer frequency

50% duty cycle(1)

10 10.2 MHz

SPI_tpcld_tsdo_trans Propagation delay

SCLK to data at SDO is valid

100

L9908

Functional description

DS13546 - Rev 5

page 105/152

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