 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
STA381BWS датащи(PDF) 173 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STA381BWS датащи(HTML) 173 Page - STMicroelectronics |
|
|
173 / 174 page  DocID018937 Rev 7 173/174 STA381BWS Revision history 10 Revision history Table 184. Document revision history Date Revision Changes 08-Jun-2011 1 Initial release 28-Jun-2011 2 Removed TQFP64 package option 02-Sep-2011 3 Added note to Figure 46, 47, 48, 49, 50, and Section 8.2: Headphone and 2 Vrms line out, referencing AN3959 20-Dec-2011 4 Updated names of pin 32 and 33 in Figure 1: Block diagram, Figure 2: Pin connections VQFN48 (top view) and Table 2: Pin list Document promoted from preliminary to full datasheet 17-Jan-2012 5 Added “VDD3V3CHP” to Table 3 and Table 5 Updated footnotes in Table 7 Updated register names to “SVUP” and “SVDN” for addresses 37 and 38 in Table 100 Updated text in Table 46 andTable 121: PWM speed mode Updated 2.0 channels, two full-bridges (OCFG = 00) on page 121 Updated 2.1 channels, two full-bridges + one external full-bridge (OCFG = 10) on page 123 Updated high-pass filter in Table 152 Textual changes to formulas in Section 7.17: EQ soft volume configuration registers (addr 0x37 - 0x38) 20-Jul-2012 6 Removed ECLE bit and sections concerning “Auto EAPD on clock loss” from datasheet Updated Table 14: Default register map table: NEW MAP on page 45 Updated Table 100: I2C registers summary on page 106 Updated Section 6.32: Enhanced zero-detect mute and input level measurement (address 0x61-0x65, 0x3F, 0x40, 0x6F) on page 97 Added Table 90: Manual threshold register 0x3F, 0x40 and 0x6F on page 98 Added Section 6.36: Charge pump synchronization (address 0x70) on page 101 Added Table 98: Charge pump sync configuration bits on page 101 Updated Section 7.24: Enhanced zero-detect mute and input level measurement (address 0x50-0x54, 0x2E, 0x2F and 0x5E) on page 158 Added Table 174: Manual threshold register 0x2E, 0x2F and 0x5E on page 160 Added Section 7.28: Charge pump synchronization (address 0x5F) on page 163 Added Table 180: Charge pump sync configuration bits on page 163 17-May-2013 7 Added Section 3.6: Power-on/off sequence (added Figure 4 and Figure 5) Updated description of CHPRD bit in Table 98 and Table 180 Obsolete Product(s) - Obsolete Product(s) |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
