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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32MP151AAA3T датащи(PDF) 216 Page - STMicroelectronics |
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STM32MP151AAA3T датащи(HTML) 216 Page - STMicroelectronics |
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216 / 245 page  Electrical characteristics STM32MP151A 216/245 DS12500 Rev 1 supply voltage conditions summarized in Table 13: General operating conditions, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 10 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5×VDD • I/O compensation cell enabled Refer to Section 0.3.16: I/O port characteristics for more details on the input/output alternate function characteristics (CK, SD, WS). Table 95. I2S dynamic characteristics(1) Symbol Parameter Conditions Min Max Unit fMCK I2S Main clock output - 256×8K 256×Fs MHz fCK I2S clock frequency Master data - 64×Fs MHz Slave data - 64×Fs tv(WS) WS valid time Master mode - 6.5 ns th(WS) WS hold time Master mode 0.5 - tsu(WS) WS setup time Slave mode 1 - th(WS) WS hold time Slave mode 0 - tsu(SD_MR) Data input setup time Master receiver 2 - tsu(SD_SR) Slave receiver 1.5 - th(SD_MR) Data input hold time Master receiver 2 - th(SD_SR) Slave receiver 0.5 - tv(SD_ST) Data output valid time Slave transmitter (after enable edge) - 15 tv(SD_MT) Master transmitter (after enable edge) - 1 th(SD_ST) Data output hold time Slave transmitter (after enable edge) 8.5 - th(SD_MT) Master transmitter (after enable edge) 0 - 1. Guaranteed by characterization results. |
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