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STM32MP151AAA3 датащи(PDF) 220 Page - STMicroelectronics

номер детали STM32MP151AAA3
подробное описание детали  Arm® Cortex®-A7 650 MHz Cortex®-M4 MPU, TFT, 35 comm. interfaces, 25 timers, adv. analog
PDF  245 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
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STM32MP151AAA3 датащи(HTML) 220 Page - STMicroelectronics

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Electrical characteristics
STM32MP151A
220/245
DS12500 Rev 1
MDIOS characteristics
The MDIOS controller is mapped on APB1 domain. The frequency of the APB bus should at
least 1.5 times the MDC frequency: Fpclk1 ≥ 1.5 * FMDC.
Figure 51. MDIOS timing diagram
SD/SDIO MMC card host interface (SDMMC) characteristics
Unless otherwise specified, the parameters given in Table 98 for the SDIO/MMC interface
are derived from tests performed under the ambient temperature, Fhclk6 frequency and VDD
supply voltage conditions summarized in Table 13: General operating conditions, with the
following configuration:
•
Output speed is set to OSPEEDRy[1:0] = 11
•
Capacitive load C = 30 pF
•
Measurement points are done at CMOS levels: 0.5×VDD
•
I/O compensation cell enabled
•
HSLV activated when VDD ≤ 2.7 V
•
Delay block disabled
Refer to Section 0.3.16: I/O port characteristics for more details on the input/output
characteristics.
Table 97. MDIOS timing parameters
Symbol
Parameter
Min
Typ
Max
Unit
FMDC
Management data clock
-
-
30
MHz
td(MDIOS)
Management data input/output output valid time
6.5
8
19
ns
tsu(MDIOS) Management data input/output setup time
1-
-
th(MDIOS)
Management data input/output hold time
0.5
-
-
MSv50900V1
tsu(MDIOS)
TMDC
th(MDIOS)
td(MDIOS)
MDIOS_MDC
MDIOS_MDIO(I)
MDIOS_MDIO(O)



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