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STM32MP151AAA3 датащи(PDF) 202 Page - STMicroelectronics |
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STM32MP151AAA3 датащи(HTML) 202 Page - STMicroelectronics |
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202 / 245 page ![]() Electrical characteristics STM32MP151A 202/245 DS12500 Rev 1 6.3.25 DTS characteristics 6.3.26 VBAT ADC monitoring characteristics and charging characteristics Table 79. Temperature sensor calibration values Symbol Parameter Memory address TS_CAL1 TS ADC raw data acquired at temperature of 30 °C ±5 °C VDDA = VREF+ = 3.3 V ±10 mV 0x5C00 525C[15:0](1)(2) 1. It is mandatory to read a 32-bit word and to do relevant masking and shifting to isolate the required bits. 2. This address is located inside the BSEC and the access is allowed after being enabled in the RCC. TS_CAL2 TS ADC raw data acquired at temperature of 130 °C ±2 °C VDDA = VREF+ = 3.3 V ±10 mV 0x5C00 525C[31:16](1)(2) Table 80. DTS characteristics(1) 1. Guaranteed by design. Symbol Parameter Conditions Min Typ Max Unit fDTP Output Clock frequency (PTAT dependency) TBD TBD TBD kHz TL Linearity with temperature (from Output clock frequency). Temperature error at 1.1 V TBD TBD TBD °C TTOTAL_ ERROR (2) 2. Guaranteed by characterization. Temperature offset measurement Temperature: -40 to 125 °C TBD TBD TBD °C TVDD CORE Additional error due to supply variation -10 - °C/V tTRIM Calibration time 2 - - ms tWAKE_UP Wake-up time from off state until DTP ready signal = 1 -50 - μs IDDCORE_DTP DTP consumption on VDDCORE -20 TBD µA Table 81. VBAT ADC monitoring characteristics Symbol Parameter Min Typ Max Unit R Resistor bridge for VBAT -TBD - kΩ Q Ratio on VBAT measurement - 4 - - Er(1) 1. Guaranteed by design. Error on Q –10 - +10 % tS_vbat(1) ADC sampling time when reading VBAT input 9.8 - - µs |
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