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PIC12LF1501 датащи(PDF) 185 Page - Microchip Technology |
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PIC12LF1501 датащи(HTML) 185 Page - Microchip Technology |
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185 / 352 page ![]() 2011-2015 Microchip Technology Inc. DS40001607D-page 185 PIC16(L)F1503 21.5.8 GENERAL CALL ADDRESS SUPPORT The addressing procedure for the I2C bus is such that the first byte after the Start condition usually deter- mines which device will be the slave addressed by the master device. The exception is the general call address which can address all devices. When this address is used, all devices should, in theory, respond with an acknowledge. The general call address is a reserved address in the I2C protocol, defined as address 0x00. When the GCEN bit of the SSPxCON2 register is set, the slave module will automatically ACK the reception of this address regardless of the value stored in SSPxADD. After the slave clocks in an address of all zeros with the R/W bit clear, an interrupt is generated and slave software can read SSPxBUF and respond. Figure 21-24 shows a General Call reception sequence. In 10-bit Address mode, the UA bit will not be set on the reception of the general call address. The slave will prepare to receive the second byte as data, just as it would in 7-bit mode. If the AHEN bit of the SSPxCON3 register is set, just as with any other address reception, the slave hard- ware will stretch the clock after the eighth falling edge of SCLx. The slave must then set its ACKDT value and release the clock with communication progressing as it would normally. FIGURE 21-24: SLAVE MODE GENERAL CALL ADDRESS SEQUENCE 21.5.9 SSPx MASK REGISTER An SSPx Mask (SSPxMSK) register (Register 21-5) is available in I2C Slave mode as a mask for the value held in the SSPxSR register during an address comparison operation. A zero (‘0’) bit in the SSPxMSK register has the effect of making the corresponding bit of the received address a “don’t care”. This register is reset to all ‘1’s upon any Reset condition and, therefore, has no effect on standard SSPx operation until written with a mask value. The SSPx Mask register is active during: • 7-bit Address mode: address compare of A<7:1>. • 10-bit Address mode: address compare of A<7:0> only. The SSPx mask has no effect during the reception of the first (high) byte of the address. SDAx SCLx S SSPxIF BF (SSPxSTAT<0>) Cleared by software SSPxBUF is read R/W = 0 ACK General Call Address Address is compared to General Call Address Receiving Data ACK 12 3 4 5 6 7 8 9 1 2 3 45 67 8 9 D7 D6 D5 D4 D3 D2 D1 D0 after ACK, set interrupt GCEN (SSPxCON2<7>) ’1’ |
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