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LAN9252V/ML датащи(PDF) 217 Page - Microchip Technology

номер детали LAN9252V/ML
подробное описание детали  2/3-Port EtherCAT® Slave Controller with Integrated Ethernet PHYs
PDF  329 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9252V/ML датащи(HTML) 217 Page - Microchip Technology

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 2015 Microchip Technology Inc.
DS00001909A-page 217
LAN9252
12.13.3
ETHERCAT CSR INTERFACE DATA REGISTER (ECAT_CSR_DATA)
This read/write register is used in conjunction with the EtherCAT CSR Interface Command Register (ECAT_CSR_CMD)
to perform read and write operations with the EtherCAT Core CSRs.
Offset:
300h
Size:
32 bits
Bits
Description
Type
Default
31:0
EtherCAT CSR Data (CSR_DATA)
This field contains the value read from or written to the EtherCAT Core CSR.
The EtherCAT Core CSR is selected via the CSR Address (CSR_ADDR) bits
of the EtherCAT CSR Interface Command Register (ECAT_CSR_CMD).
Valid data is always written to or read from the lower bits of this field. The H/
W handles any required byte alignment.
Upon a read, the value returned depends on the Read/Write (R_nW) bit in
the EtherCAT CSR Interface Command Register (ECAT_CSR_CMD). If
Read/Write (R_nW) is set, the data is from the EtherCAT Core. If Read/Write
(R_nW) is cleared, the data is the value that was last written into this register.
R/W
00000000h



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