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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST10F271E датащи(PDF) 138 Page - STMicroelectronics |
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ST10F271E датащи(HTML) 138 Page - STMicroelectronics |
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138 / 180 page  Electrical characteristics ST10F271B/ST10F271E 138/180 Fast conversion can be achieved by programming the respective times to their absolute possible minimum. This is preferable for scanning high frequency signals. The internal resistance of analog source and analog supply must be sufficiently low, however. High internal resistance can be achieved by programming the respective times to a higher value, or the possible maximum. This is preferable when using analog sources and supply with a high internal resistance in order to keep the current as low as possible. The conversion rate in this case may be considerably lower, however. The conversion times are programmed via the upper four bits of register ADCON. Bit fields ADCTC and ADSTC are used to define the basic conversion time and in particular the partition between sample phase and comparison phases. The table below lists the possible combinations. The timings refer to the unit TCL, where fCPU = 1/2TCL. A complete conversion time includes the conversion itself, the sample time and the time required to transfer the digital value to the result register. Note: The total conversion time is compatible with the formula valid for ST10F269, while the meaning of the bit fields ADCTC and ADSTC is no longer compatible: the minimum conversion time is 388 TCL, which at 40 MHz CPU frequency corresponds to 4.85 µs (see ST10F269). 24.7.2 A/D conversion accuracy The A/D Converter compares the analog voltage sampled on the selected analog input channel to its analog reference voltage (VAREF) and converts it into 10-bit digital data. The absolute accuracy of the A/D conversion is the deviation between the input analog value and the output digital value. It includes the following errors: ● Offset error (OFS) ● Gain Error (GE) ● Quantization error ● Non-Linearity error (Differential and Integral) Table 67. A/D converter programming ADCTC ADSTC Sample Comparison Extra Total conversion 00 00 TCL * 120 TCL * 240 TCL * 28 TCL * 388 00 01 TCL * 140 TCL * 280 TCL * 16 TCL * 436 00 10 TCL * 200 TCL * 280 TCL * 52 TCL * 532 00 11 TCL * 400 TCL * 280 TCL * 44 TCL * 724 11 00 TCL * 240 TCL * 480 TCL * 52 TCL * 772 11 01 TCL * 280 TCL * 560 TCL * 28 TCL * 868 11 10 TCL * 400 TCL * 560 TCL * 100 TCL * 1060 11 11 TCL * 800 TCL * 560 TCL * 52 TCL * 1444 10 00 TCL * 480 TCL * 960 TCL * 100 TCL * 1540 10 01 TCL * 560 TCL * 1120 TCL * 52 TCL * 1732 10 10 TCL * 800 TCL * 1120 TCL * 196 TCL * 2116 10 11 TCL * 1600 TCL * 1120 TCL * 164 TCL * 2884 |
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