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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP86FS49AIUG датащи(PDF) 237 Page - Toshiba Semiconductor |
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TMP86FS49AIUG датащи(HTML) 237 Page - Toshiba Semiconductor |
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237 / 296 page  Page 221 TMP86FS49AIUG 18. Key-on Wakeup (KWU) In the TMP86FS49AIUG, the STOP mode is released by not only P20(INT5/STOP) pin but also four (STOP0 to STOP3) pins. When the STOP mode is released by STOP0 to STOP3 pins, the STOP pin needs to be used. In details, refer to the following section " 18.2 Control ". 18.1 Configuration Figure 18-1 Key-on Wakeup Circuit 18.2 Control STOP0 to STOP3 pins can controlled by Key-on Wakeup Control Register (STOPCR). It can be configured as enable/disable in 1-bit unit. When those pins are used for STOP mode release, configure corresponding I/O pins to input mode by I/O port register beforehand. 18.3 Function Stop mode can be entered by setting up the System Control Register (SYSCR1), and can be exited by detecting the "L" level on STOP0 to STOP3 pins, which are enabled by STOPCR, for releasing STOP mode (Note1). Key-on Wakeup Control Register STOPCR 76 54 3 2 1 0 (0F9FH) STOP3 STOP2 STOP1 STOP0 (Initial value: 0000 ****) STOP3 STOP mode released by STOP3 0:Disable 1:Enable Write only STOP2 STOP mode released by STOP2 0:Disable 1:Enable Write only STOP1 STOP mode released by STOP1 0:Disable 1:Enable Write only STOP0 STOP mode released by STOP0 0:Disable 1:Enable Write only STOPCR INT5 STOP STOP mode release signal (1: Release) (0F9FH) STOP0 STOP1 STOP2 STOP3 |
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