TMP86CS49UG datasheet(170/252 Pages) TOSHIBA

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Page 156

13. Asynchronous Serial interface (UART2 )

13.9 Status Flag

TMP86CS49UG

Figure 13-7 Generation of Overrun Error

Note:Receive operations are disabled until the overrun error flag UART2SR<OERR> is cleared.

13.9.4 Receive Data Buffer Full

Loading the received data in RD2BUF sets receive data buffer full flag UART2SR<RBFL> to "1". The

UART2SR<RBFL> is cleared to “0” when the RD2BUF is read after reading the UART2SR.

Figure 13-8 Generation of Receive Data Buffer Full

Note:If the overrun error flag UART2SR<OERR> is set during the period between reading the UART2SR and read-

ing the RD2BUF, it cannot be cleared by only reading the RD2BUF. Therefore, after reading the RD2BUF,

read the UART2SR again to check whether or not the overrun error flag which should have been cleared still

remains set.

13.9.5 Transmit Data Buffer Empty

When no data is in the transmit buffer TD2BUF, that is, when data in TD2BUF are transferred to the transmit

shift register and data transmit starts, transmit data buffer empty flag UART2SR<TBEP> is set to “1”. The

UART2SR<TBEP> is cleared to “0” when the TD2BUF is written after reading the UART2SR.

Final bit

Stop

Shift register

xxxx0*

1xxxx0

yyyy

xxx0**

RXD2 pin

UART2SR<OERR>

INTRXD2 interrupt

After reading UART2SR then

RD2BUF clears OERR.

RD2BUF

UART2SR<RBFL>

Final bit

Stop

Shift register

xxxx0*

1xxxx0

xxxx

yyyy

xxx0**

RXD2 pin

UART2SR<RBFL>

INTRXD2 interrupt

RD2BUF

After reading UART2SR then

RD2BUF clears RBFL.

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