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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST10F273E датащи(PDF) 142 Page - STMicroelectronics |
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ST10F273E датащи(HTML) 142 Page - STMicroelectronics |
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142 / 179 page  Electrical characteristics ST10F273E 142/179 above, it is simple to derive the following relation between the ideal and real sampled voltage on CS: From this formula, in the worst case (when VA is maximum, that is for instance 5V), assuming to accept a maximum error of half a count (~2.44mV), it is immediately evident a constraints on CF value: In the next section an example of how to design the external network is provided, assuming some reasonable values for the internal parameters and making hypothesis on the characteristics of the analog signal to be sampled. 24.7.4.1 Example of external network sizing The following hypothesis are formulated in order to proceed in designing the external network on A/D Converter input pins: ● Analog Signal Source Bandwidth (f0): 10 kHz ● Conversion Rate (fC): 25 kHz ● Sampling Time (TS): 1 µs ● Pin Input Capacitance (CP1): 5pF ● Pin Input Routing Capacitance (CP2): 1pF ● Sampling Capacitance (CS): 4pF ● Maximum Input Current Injection (IINJ): 3mA ● Maximum Analog Source Voltage (VAM):12V ● Analog Source Impedance (RS): 100 Ω ● Channel Switch Resistance (RSW): 500 Ω ● Sampling Switch Resistance (RAD): 200 Ω V A V A2 ----------- C P1 C P2 +C F + C P1 C P2 +C F C S ++ ------------------------------------------------------------ = C F 2048 C S ⋅ > |
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