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14.8 I/O port pin characteristics

14.8.1 General characteristics

Subject to general operating conditions for VDD, fCPU, and TA unless otherwise specified.

Notes:

1. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for

example or an external pull-up or pull-down resistor (see Figure 57). Static peak current value taken at a fixed VIN value,

based on design simulation and technology characteristics, not tested in production. This value depends on VDD and tem-

perature values.

2. The RPU pull-up equivalent resistor is based on a resistive transistor (corresponding IPU current characteristics de-

scribed in Figure 58).

3. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external

interrupt source.

Figure 57. Two typical applications with unused I/O pin

Figure 58. Typ. IPU vs. VDD

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

Input low level voltage

0.3xVDD

VIH

Input high level voltage

0.7xVDD

VIN

Input voltage

True open drain I/O pins

VSS

6.0

Other I/O pins

VDD

Vhys

Schmitt trigger voltage hysteresis

400

Input leakage current

VSS≤VIN≤VDD

±1

µA

Static current consumption induced

by each floating input pin 1)

Floating input mode

400

RPU

Weak pull-up equivalent resistor 2)

VIN=VSS

VDD=5V

120

Ω

CIO

I/O pin capacitance

tf(IO)out

Output high to low level fall time

CL=50pF

Between 10% and 90%

tr(IO)out

Output low to high level rise time

tw(IT)in

External interrupt pulse time 3)

1tCPU

10k

Ω

UNUSED I/O PORT

ST72XXX

10k

Ω

UNUSED I/O PORT

ST72XXX

VDD

Pull-up current (µA)

4.2

4.4

4.6

4.8

5.2

5.4

Vdd (V)

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