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ICS1893CFILF датащи(PDF) 117 Page - Integrated Circuit Systems

номер детали ICS1893CFILF
подробное описание детали  3.3-V 10Base-T/100Base-TX Integrated PHYceive
PDF  126 Pages
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производитель  ICST [Integrated Circuit Systems]
домашняя страница  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS1893CFILF датащи(HTML) 117 Page - Integrated Circuit Systems

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Chapter 9 DC and AC Operating Conditions
ICS1893CF, Rev. F, 03/01/07
Mar. 2007
117
ICS1893CF Data Sheet Rev. F - Release
Copyright © 2007, Integrated Device Technology, Inc.
All rights reserved.
9.5.15 Reset: Power-On Reset
Table 9-22 lists the significant time periods for the power-on reset. The time periods consist of timings of
signals on the following pins:
• VDD
• TXCLK
Figure 9-16 shows the timing diagram for the time periods.
Figure 9-16. Power-On Reset Timing Diagram
Table 9-22. Power-On Reset Timing
Time
Period
Parameter
Conditions
Min.
Typ.
Max.
Units
t1
VDD
≥ 2.7 V to Reset Complete
–
40
45
500
ms
TXCLK
Valid
VDD
2.7 V
t1



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