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DSPIC30F3012AT20E/ML датащи(PDF) 148 Page - Microchip Technology |
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DSPIC30F3012AT20E/ML датащи(HTML) 148 Page - Microchip Technology |
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148 / 205 page ![]() dsPIC30F2011/2012/3012/3013 DS70139E-page 146 © 2006 Microchip Technology Inc. TABLE 20-2: THERMAL OPERATING CONDITIONS Rating Symbol Min Typ Max Unit dsPIC30F201x-30I dsPIC30F301x-30I Operating Junction Temperature Range TJ -40 +125 °C Operating Ambient Temperature Range TA -40 +85 °C dsPIC30F201x-20E dsPIC30F301x-20E Operating Junction Temperature Range TJ -40 +150 °C Operating Ambient Temperature Range TA -40 +125 °C Power Dissipation: Internal chip power dissipation: PD PINT + PI/O W I/O Pin power dissipation: Maximum Allowed Power Dissipation PDMAX (TJ - TA) / θJA W TABLE 20-3: THERMAL PACKAGING CHARACTERISTICS Characteristic Symbol Typ Max Unit Notes Package Thermal Resistance, 18-pin PDIP (P) θJA 44 — °C/W 1 Package Thermal Resistance, 18-pin SOIC (SO) θJA 57 — °C/W 1 Package Thermal Resistance, 28-pin SPDIP (SP) θJA 42 — °C/W 1 Package Thermal Resistance, 28-pin (SOIC) θJA 49 — °C/W 1 Package Thermal Resistance, 44-pin QFN θJA 28 — °C/W 1 Note 1: Junction to ambient thermal resistance, Theta-ja ( θJA) numbers are achieved by package simulations. TABLE 20-4: DC TEMPERATURE AND VOLTAGE SPECIFICATIONS DC CHARACTERISTICS Standard Operating Conditions: 2.5V to 5.5V (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for Industrial -40°C ≤ TA ≤ +125°C for Extended Param No. Symbol Characteristic Min Typ(1) Max Units Conditions Operating Voltage(2) DC10 VDD Supply Voltage 2.5 — 5.5 V Industrial temperature DC11 VDD Supply Voltage 3.0 — 5.5 V Extended temperature DC12 VDR RAM Data Retention Voltage(3) —1.5 — V DC16 VPOR VDD Start Voltage (to ensure internal Power-on Reset signal) —VSS —V DC17 SVDD VDD Rise Rate (to ensure internal Power-on Reset signal) 0.05 V/ms 0-5V in 0.1 sec 0-3V in 60 ms Note 1: “Typ” column data is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and are not tested. 2: These parameters are characterized but not tested in manufacturing. 3: This is the limit to which VDD can be lowered without losing RAM data. PINT VDD IDD IOH ∑ – () × = PI/O VDD VOH – {} IOH × () ∑ VOL I OL × () ∑ + = |
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