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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ADC3910CSSS датащи(PDF) 120 Page - Texas Instruments |
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ADC3910CSSS датащи(HTML) 120 Page - Texas Instruments |
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120 / 131 page  DC/DC Regulator 5V-12V LDO GND GND AVDD IOVDD FB FB FB 47uF 47uF 10uF 10uF 0.1uF 10uF 10uF 0.1uF 2.1V 1.8V FB = Ferrite bead filter GND GND Figure 7-5. Example: LDO Linear Regulator Approach DC/DC Regulator 5V-12V GND GND AVDD IOVDD EMI FILTER FB FB 10uF 10uF 0.1uF 10uF 10uF 0.1uF 1.8V GND 10uF 10uF 10uF Ripple filter notch frequency to match switching frequency of the DC/DC regulator FB = Ferrite bead filter Figure 7-6. Example: Switcher-Only Approach 7.5 Layout 7.5.1 Layout Guidelines There are several critical signals which require specific care during board design: 1. Analog input and clock signals • Traces should be as short as possible and vias should be avoided where possible to minimize impedance discontinuities. 2. Digital output interface • Traces should be as short as possible to reduce capacitive load seen by the CMOS outputs. • Series resistance should be used to reduce instantaneous current demand and improve signal integrity. 3. Power and ground connections • Provide low resistance connection paths to all power and ground pins. • Use power and ground planes instead of traces. • Avoid narrow, isolated paths which increase the connection resistance. • Use a signal/ground/power circuit board stackup to maximize coupling between the ground and power plane. ADC3910D125 SBASAD1 – DECEMBER 2023 www.ti.com 120 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: ADC3910D125 |
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