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6.16 Peripheral Component Interconnect (PCI)

6.16.1 PCI Device-Specific Information

TMS320DM647/TMS320DM648

Digital Media Processor

SPRS372 – MAY 2007

The DM647/DM648 digital media processors support connections to a PCI backplane via the integrated

PCI master/slave bus interface. The PCI port interfaces to DSP internal resources via the data switched

central resource. .

For more detailed information on the PCI port peripheral module, see the TMS320DM647/DM648

Peripheral Component Interconnect (PCI) User's Guide (literature number SPRUEL4).

The PCI peripheral on the DM64x device DSP conforms to the PCI Local Bus Specification (version 2.3).

The PCI peripheral can act both as a PCI bus master and as a target. It supports PCI bus operation of

speeds up to 66 MHz and uses a 32-bit data/address bus.

On the DM64x device, the pins of the PCI peripheral are multiplexed with the pins of the HPI, and GPIO

peripherals. PCI functionality for these pins is controlled (enabled/disabled) by the UHPIEN pin (H2). The

maximum speed of the PCI, 33 MHz or 66 MHz, is controlled through the PCI66 pin (G5). For more

detailed information on the peripheral control, see Section 3.

The DM64x device provides an initialization mechanism through which the default values for some of the

PCI configuration registers can be read from an I2C EEPROM. Table 6-53 shows the registers which can

be initialized through the PCI auto-initialization. Also shown is the default value of these registers when

PCI auto-initialization is not used. PCI auto-initialization is enabled by selecting PCI boot with

auto-initialization.For more information on this feature, see the TMS320DM647/DM648 Peripheral

Component

Interconnect

(PCI)

User's

Guide

(literature

number

SPRUEL4)

and

the

TMS320DM647/DM648 Bootloader Application Report (literature number SPRAAJ1).

Table 6-53. Default Values for PCI Configuration

Registers

DEFAULT

VALUE

Vendor ID/Device ID Register (PCIVENDEV)

104C B001h

Class Code/Revision ID Register (PCICLREV)

0000 0001h

Subsystem Vendor ID/Subsystem ID Register

0000 0000h

(PCISUBID)

Max Latency/Min Grant/Interrupt Pin/Interrupt Line

0000 0100h

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