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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST72344 датащи(PDF) 172 Page - STMicroelectronics |
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ST72344 датащи(HTML) 172 Page - STMicroelectronics |
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172 / 191 page  ST72340, ST72344, ST72345 172/191 13.11 CONTROL PIN CHARACTERISTICS 13.11.1 Asynchronous RESET Pin TA = -40°C to 85°C, unless otherwise specified Notes: 1. Data based on characterization results, not tested in production. 2. The IIO current sunk must always respect the absolute maximum rating specified in Section 13.2.2 and the sum of IIO (I/O ports and control pins) must not exceed IVSS. 3. The RON pull-up equivalent resistor is based on a resistive transistor. Specified for voltages on RESET pin between VILmax and VDD 4. To guarantee the reset of the device, a minimum pulse has to be applied to the RESET pin. All short pulses applied on RESET pin with a duration below th(RSTL)in can be ignored. Symbol Parameter Conditions Min Typ Max Unit VIL Input low level voltage Vss - 0.3 0.3xVDD V VIH Input high level voltage 0.7xVDD VDD + 0.3 Vhys Schmitt trigger voltage hysteresis 1) 2V VOL Output low level voltage 2) VDD=5V IIO=+5mA 0.5 1.0 V IIO=+2mA 0.2 0.4 RON Pull-up equivalent resistor 3) 1) VDD=5V 20 40 80 k Ω VDD=3V 40 70 120 tw(RSTL)out Generated reset pulse duration Internal reset sources 26 µs th(RSTL)in External reset pulse hold time 4) 20 µs tg(RSTL)in Filtered glitch duration 200 ns |
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