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ICS1893AFILF датащи(PDF) 122 Page - Renesas Technology Corp |
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ICS1893AFILF датащи(HTML) 122 Page - Renesas Technology Corp |
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122 / 137 page ![]() ICS1893AF, Rev D 10/26/04 October, 2004 122 Chapter 10 DC and AC Operating Conditions ICS1893AF Data Sheet - Release Copyright © 2004, Integrated Circuit Systems, Inc. All rights reserved. 10.5.9 10M Media Independent Interface: Transmit Latency Table 10-16 lists the significant time periods for the 10M MII transmit latency. The time periods consist of timings of signals on the following pins: • TXEN • TXCLK • TXD (that is, TXD[3:0]) • TP_TX (that is, TP_TXP and TP_TXN) Figure 10-10 shows the timing diagram for the time periods. Figure 10-10. 10M MII Transmit Latency Timing Diagram Table 10-16. 10M MII Transmit Latency Timing Time Period Parameter Conditions Min. Typ. Max. Units t1 TXD Sampled to MDI Output of First Bit 10M MII – 1.2 2 Bit times TXCLK TXEN TXD † Manchester encoding is not shown. 55 5 t1 TP_TX† |
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