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QB-R5F100SL-TB датащи(PDF) 149 Page - Renesas Technology Corp |
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QB-R5F100SL-TB датащи(HTML) 149 Page - Renesas Technology Corp |
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149 / 207 page ![]() RL78/G13 3. ELECTRICAL SPECIFICATIONS (G: INDUSTRIAL APPLICATIONS TA = –40 to +105°C) R01DS0131EJ0350 Rev.3.50 149 of 200 Jun 30, 2020 Notes 5. The smaller maximum transfer rate derived by using fMCK/12 or the following expression is the valid maximum transfer rate. Expression for calculating the transfer rate when 2.4 V ≤ EVDD0 < 3.3 V and 1.6 V ≤ Vb ≤ 2.0 V Maximum transfer rate = 1 [bps] {–Cb × Rb × ln (1 – 1.5 Vb )} × 3 1 Transfer rate × 2 – {–Cb × Rb × ln (1 – 1.5 Vb )} Baud rate error (theoretical value) = × 100 [%] ( 1 Transfer rate ) × Number of transferred bits * This value is the theoretical value of the relative difference between the transmission and reception sides. 6. This value as an example is calculated when the conditions described in the “Conditions” column are met. Refer to Note 5 above to calculate the maximum transfer rate under conditions of the customer. Caution Select the TTL input buffer for the RxDq pin and the N-ch open drain output (VDD tolerance (for the 20- to 52-pin products)/EVDD tolerance (for the 64- to 100-pin products)) mode for the TxDq pin by using port input mode register g (PIMg) and port output mode register g (POMg). For VIH and VIL, see the DC characteristics with TTL input buffer selected. UART mode connection diagram (during communication at different potential) RL78 microcontroller TxDq RxDq Rx Tx User device Vb Rb |
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