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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32H757AI датащи(PDF) 184 Page - STMicroelectronics |
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STM32H757AI датащи(HTML) 184 Page - STMicroelectronics |
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184 / 251 page  Electrical characteristics STM32H757xI 184/251 DS12931 Rev 1 6.3.21 Quad-SPI interface characteristics Unless otherwise specified, the parameters given in Table 96 and Table 97 for QUADSPI are derived from tests performed under the ambient temperature, fAHB frequency and VDD supply voltage conditions summarized in Table 23: General operating conditions, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 11 • Measurement points are done at CMOS levels: 0.5VDD • IO Compensation cell activated. • HSLV activated when VDD ≤ 2.7 V • VOS level set to VOS1 Refer to Section 6.3.18: I/O port characteristics for more details on the input/output alternate function characteristics. The following table summarizes the parameters measured in SDR mode. Table 95. LPSDR SDRAM Write timings(1) 1. Guaranteed by characterization results. Symbol Parameter Min Max Unit tw(SDCLK) FMC_SDCLK period 2Tfmc_ker_ck – 1 2Tfmc_ker_ck+0.5 ns td(SDCLKL _Data) Data output valid time - 2.5 th(SDCLKL _Data) Data output hold time 0 - td(SDCLKL_Add) Address valid time - 2.5 td(SDCLKL-SDNWE) SDNWE valid time - 2.5 th(SDCLKL-SDNWE) SDNWE hold time 0 - td(SDCLKL- SDNE) Chip select valid time - 3 th(SDCLKL- SDNE) Chip select hold time 0 - td(SDCLKL-SDNRAS) SDNRAS valid time - 1.5 th(SDCLKL-SDNRAS) SDNRAS hold time 0 - td(SDCLKL-SDNCAS) SDNCAS valid time - 1.5 td(SDCLKL-SDNCAS) SDNCAS hold time 0 - Table 96. QUADSPI characteristics in SDR mode(1) Symbol Parameter Conditions Min Typ Max Unit Fck11/TCK QUADSPI clock frequency 2.7<VDD<3.6 V CL = 20 pF -- 133 MHz 1.62<VDD<3.6 V CL = 15 pF -- 100 |
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