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AM6546 датащи(PDF) 238 Page - Texas Instruments

номер детали AM6546
подробное описание детали  AM654x, AM652x Sitara™ Processors Silicon Revision 2.1
PDF  284 Pages
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домашняя страница  http://www.ti.com
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AM6546 датащи(HTML) 238 Page - Texas Instruments

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7.9.5.21.6 PRU_ICSSG RGMII, MII_RT, and Switch
7.9.5.21.6.1 PRU_ICSSG MDIO Electrical Data and Timing
Table 7-75 presents MDIO timing conditions.
Table 7-75. PRU_ICSSG MDIO Timing Conditions
PARAMETER
MIN
MAX
UNIT
INPUT CONDITIONS
SRI
Input slew rate
0.9
3.6
V/ns
OUTPUT CONDITIONS
CL
Output load capacitance
10
470
pF
7.9.5.21.6.1.1 PRU_ICSSG MDIO Timing Requirements
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
PRMDI1 tsu(MDIO-MDC)
Setup time, MDIO valid before MDC High
90
ns
PRMDI2 th(MDC-MDIO)
Hold time, MDIO valid after MDC High
0
ns
MDIO_CLK (Output)
PRMDI1
PRMDI2
MDIO_DATA (Input)
SPRS91x_TIMING_PRU_MII_RT_01
Figure 7-111. PRU_ICSSG MDIO_DATA Timing – Input Mode
AM6548, AM6528, AM6546, AM6526
SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021
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