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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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CC2430-RTR1-F64Z датащи(PDF) 155 Page - Texas Instruments |
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CC2430-RTR1-F64Z датащи(HTML) 155 Page - Texas Instruments |
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155 / 234 page  CC2430 CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A Page 155 of 232 U1UCR (0xFB) – USART 1 UART Control Bit Name Reset R/W Description 7 FLUSH 0 R0/W1 Flush unit. When set, this event will immediately stop the current operation and return the unit to idle state. UART hardware flow enable. Selects use of hardware flow control with RTS and CTS pins 0 Flow control disabled 6 FLOW 0 R/W 1 Flow control enabled UART data bit 9 contents. This value is used 9 bit transfer is enabled. When parity is disabled, the value written to D9 is transmitted as the bit 9 when 9 bit data is enabled. If parity is enabled then this bit sets the parity level as follows. 0Odd parity 5 D9 0 R/W 1 Even parity UART 9-bit data enable. When this bit is 1, data is 9 bits and the content of data bit 9 is given by D9 and PARITY. 0 8 bits transfer 4 BIT9 0 R/W 1 9 bits transfer UART parity enable. 0 Parity disabled 3 PARITY 0 R/W 1 Parity enabled UART number of stop bits. Selects the number of stop bits to transmit 0 1 stop bit 2 SPB 0 R/W 1 2 stop bits UART stop bit level 0 Low stop bit 1 STOP 1 R/W 1 High stop bit UART start bit level. The polarity of the idle line is assumed the opposite of the selected start bit level. 0 Low start bit 0 START 0 R/W 1 High start bit |
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