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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DVR датащи(PDF) 184 Page - Microchip Technology |
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DVR датащи(HTML) 184 Page - Microchip Technology |
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184 / 416 page  PIC24FJ256GA705 FAMILY DS30010118D-page 184 2016-2018 Microchip Technology Inc. 16.1 Time Base Generator The Timer Clock Generator (TCG) generates a clock for the module’s internal time base using one of the clock signals already available on the microcontroller. This is used as the time reference for the module in its three major modes. The internal time base is shown in Figure 16-2. There are eight inputs available to the clock generator, which are selected using the CLKSEL<2:0> bits (CCPxCON1L<10:8>). Available sources include the FRC and LPRC, the Secondary Oscillator and the TCLKI external clock inputs. The system clock is the default source (CLKSEL<2:0> = 000). On PIC24FJ256GA705 family devices, clock sources to the MCCPx module must be synchronized with the system clock. As a result, when clock sources are selected, clock input timing restrictions or module operating restrictions may exist. FIGURE 16-2: TIMER CLOCK GENERATOR CLKSEL<2:0> TMRPS<1:0> Prescaler Clock Synchronizer TMRSYNC Gate(1) SSDG Clock Sources To Rest of Module Note 1: Gating available in Timer modes only. |
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