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SPC58EEX датащи(PDF) 120 Page - STMicroelectronics

номер детали SPC58EEX
подробное описание детали  32-bit Power Architecture microcontroller for automotive ASIL-D applications
PDF  154 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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SPC58EEX датащи(HTML) 120 Page - STMicroelectronics

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Electrical characteristics
SPC58EEx, SPC58NEx
120/154
DS11646 Rev 4
Note:
In the following table, all timing specifications are referenced from REF_CLK = 1.4 V to the
valid input levels, 0.8 V and 2.0 V.
Figure 43. RMII receive signal timing diagram
3.18.3.7
RMII transmit signal timing (TXD[1:0], TX_EN)
The transmitter functions correctly up to a REF_CLK maximum frequency of 50 MHz + 1%.
There is no minimum frequency requirement. The system clock frequency must be at least
equal to or greater than the TX_CLK frequency, which is half that of the REF_CLK
frequency.
The transmit outputs (TXD[1:0], TX_EN) can be programmed to transition from either the
rising or falling edge of REF_CLK, and the timing is the same in either case. This option
allows the use of non-compliant RMII PHYs.
Note:
In the following table, all timing specifications are referenced from REF_CLK = 1.4 V to the
valid output levels, 0.8 V and 2.0 V.
RMII transmit signal valid timing specified is considering the rise/fall time of the ref_clk on
the pad as 1ns.
Table 66. RMII receive signal timing
Symbol
C
Characteristic
Value
Unit
Min
Max
R1
CC D RXD[1:0], CRS_DV to REF_CLK setup
4
ns
R2
CC D REF_CLK to RXD[1:0], CRS_DV hold
2
ns
R3
CC D REF_CLK pulse width high
35%
65%
REF_CLK period
R4
CC D REF_CLK pulse width low
35%
65%
REF_CLK period
R1
R2
REF_CLK (input)
RXD[1:0] (inputs)
CRS_DV
R3
R4



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