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SPC58ECX датащи(PDF) 102 Page - STMicroelectronics |
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SPC58ECX датащи(HTML) 102 Page - STMicroelectronics |
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102 / 153 page ![]() Electrical characteristics SPC584Cx, SPC58ECx 102/153 DS11620 Rev 8 Figure 45. TxD Signal propagation delays 4.17.4.3 RxD Table 58. TxD output characteristics Symbol C Characteristic(1),(2) Value Unit Min Max dCCTxAsym CC D Asymmetry of sending CC at 25 pF load (= dCCTxD50% − 100 ns) –2.45 2.45 ns dCCTxDRISE25+dCCTxDFALL25 CC D Sum of Rise and Fall time of TxD signal at the output pin(3) —9(4) ns D— 9(5) dCCTxD01 CC D Sum of delay between Clk to Q of the last FF and the final output buffer, rising edge —25 ns dCCTxD10 CC D Sum of delay between Clk to Q of the last FF and the final output buffer, falling edge —25 ns 1. TxD pin load maximum 25 pF. 2. Pad configured as VERY STRONG. 3. Sum of transition time simulation is performed according to Electrical Physical Layer Specification 3.0.1 and the entire temperature range of the device has been taken into account. 4. VDD_HV_IO = 5.0 V ± 10%, Transmission line Z = 50 ohms, tdelay = 1 ns, CL = 10 pF. 5. VDD_HV_IO = 3.3 V ± 10%, Transmission line Z = 50 ohms, tdelay = 0.6 ns, CL = 10 pF. dCCTxD10 dCCTxD01 TxD PE_Clk * * FlexRay Protocol Engine Clock Table 59. RxD input characteristics Symbol C Characteristic Value Unit Min Max C_CCRxD CC D Input capacitance on RxD pin — 7 pF uCCLogic_1 CC D Threshold for detecting logic high 35 70 % |
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