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STM32469VG датащи(PDF) 142 Page - STMicroelectronics |
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STM32469VG датащи(HTML) 142 Page - STMicroelectronics |
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142 / 220 page ![]() Electrical characteristics STM32F469xx 142/220 DS11189 Rev 7 SPI interface characteristics Unless otherwise specified, the parameters given in Table 64 for the SPI interface are derived from tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 17, with the following configuration: output speed set to OSPEEDRy[1:0] = 10 capacitive load C = 30 pF measurement points at CMOS levels: 0.5 VDD Refer to Section 5.3.20 for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO for SPI). 2. Spikes with widths below tAF(min) are filtered. 3. Spikes with widths above tAF(max) are not filtered Table 64. SPI dynamic characteristics(1) Symbol Parameter Conditions Min Typ Max(2) Unit fSCK 1/tc(SCK) SPI clock frequency Master mode, 2.7 V ≤ VDD ≤ 3.6 V, SPI1,4,5,6, -- 45 MHz Master mode, 1.71 V ≤ VDD ≤ 3.6 V, SPI1,4,5,6 - - 22.5 Master transmitter mode, 1.7 V ≤ VDD ≤ 3.6 V, SPI1,4,5,6 -- 45 Slave full duplex mode, 2.7 V ≤ VDD ≤ 3.6 V, SPI1,4,5,6 -- 45 Slave transmitter mode, 1.71 V ≤ VDD ≤ 3.6 V, SPI1,4,5,6 -- 33 Slave transmitter mode, 2.7 V ≤ VDD ≤ 3.6 V, SPI1,4,5,6 -- 45 Slave mode, 1.71 V ≤ VDD ≤ 3.6 V, SPI2,3 - - 22.5 Duty(SCK) Duty cycle of SPI clock frequency Slave mode 30 50 70 % |
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