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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AM6548 датащи(PDF) 230 Page - Texas Instruments |
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AM6548 датащи(HTML) 230 Page - Texas Instruments |
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230 / 282 page  7.9.5.21.1.2 PRU_ICSSG PRU Parallel Capture Mode Electrical Data and Timing 7.9.5.21.1.2.1 PRU_ICSSG PRU Timing Requirements - Parallel Capture Mode See Figure 7-96 and Figure 7-97 NO. MIN MAX UNIT PRPC1 tc(CLOCK) Cycle time, CLOCKIN 20 ns PRPC2 tw(CLOCKL) Pulse Duration, CLOCKIN Low 10 ns PRPC3 tw(CLOCKH) Pulse Duration, CLOCKIN High 10 ns PRPC4 tsu(DATAIN-CLOCK) Setup time, DATAIN valid before CLOCKIN active edge 4 ns PRPC5 th(CLOCK-DATAIN) Hold time, DATAIN valid after CLOCKIN active edge 0.6 ns CLOCKIN DATAIN PRPC1 PRPC3 PRPC2 PRPC4 PRPC5 SPRS91x_TIMING_PRU_03 Figure 7-96. PRU_ICSSG PRU Parallel Capture Timing – Rising Edge Mode CLOCKIN DATAIN PRPC1 PRPC2 PRPC3 PRPC5 SPRS91x_TIMING_PRU_04 PRPC4 Figure 7-97. PRU_ICSSG PRU Parallel Capture Timing – Falling Edge Mode 7.9.5.21.1.3 PRU_ICSSG PRU Shift Mode Electrical Data and Timing 7.9.5.21.1.3.1 PRU_ICSSG PRU Timing Requirements - Shift In Mode NO. MIN MAX UNIT PRSI1 tw(PRU_DATAINL) Pulse Duration, PRU_DATAIN Low 2+2×P (1) ns PRSI2 tw(PRU_DATAINH) Pulse Duration, PRU_DATAIN High 2+2×P (1) ns (1) P = Internal shift in clock period, defined by PRU0_GPI_DIV0 and PRU0_GPI_DIV1 bit fields in the ICSSG_GPCFGn_REG register. DATAIN PRSI1 PRSI2 SPRSP08_TIMING_PRU_05 Figure 7-98. PRU_ICSSG PRU Shift In Timing AM6548, AM6528, AM6526 SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021 www.ti.com 230 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: AM6548 AM6528 AM6526 |
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