VG6640 datasheet(123/126 Pages) STMICROELECTRONICS

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DocID023597 Rev 11

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VG6640, VD6640

Revision history

125

10-May-2015

Updated Table 36 to reflect min frame length of 1023

lines for Full FoV

Changed package information to Im2BGA

Added EXTCLK_XTAL1 and XTAL2 pins to signal

Description Table.

Update to Signal Description table.

Update to Ball Assignment diagram.

Removed references to ULPM

Changed names of CSI2 interface signals to DP_L1

format.

Updates to Table 2: Technical specifications

Removed RCCC modes from Table 33: Typical

subsampling settings

. Added notes to state only odd

values supported by Y_xxx_INC registers.

Changed “software standby”state name to “standby”.

Changed “hardware standby” state name to “reset”.

Updates to the layout guidelines in section 10.

Updates to some register descriptions.

Correction to ordering codes.

Changed “Max Storage Temperature” to 125C

Revisions to Figure 16: CSI-2 frame format

09-Oct-2015

VDIG max voltage to 2.94V

Current consumption in Table 42, Table 43 and

Table 44

Added Table 49, modification to Table 51, Table 52

Updates to Table 59

Electro-optical characteristics moved from Section 1 to,

newly created, Section 10

Power consumption in Table 2 changed to 400mW.

Removed “peak current consumption” table.

Updated ITU Timing Diagram

Replaced “Fig 20: Clock relationships” with new “Clock

Tree” diagram and updated equations below to match.

Removed Section .4.1.1: Multi-byte registers index

space

Added constraints to Knee1/2 and

SigmaGhostThresh1/2 values.

Added ParOutIF_Drive (0x24A2) register.

Added warning about the use of the clock gating options

available in the ParOutIF_Control (0x24A3) register.

Added Table 1: Device summary to cover page.

Renamed Section 4.2.9 to “Temperature sensor

registers”

Table 65. Document revision history (continued)

Date

Revision

Changes

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