поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

STM32MP157F датащи(PDF) 204 Page - STMicroelectronics

номер детали STM32MP157F
подробное описание детали  Arm® dual Cortex®-A7 800 MHz Cortex®-M4 MPU, 3D GPU, TFT/DSI, 37 comm. interfaces, 29 timers, adv. analog, crypto
PDF  260 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32MP157F датащи(HTML) 204 Page - STMicroelectronics

Back Button STM32MP157F Datasheet HTML 200Page - STMicroelectronics STM32MP157F Datasheet HTML 201Page - STMicroelectronics STM32MP157F Datasheet HTML 202Page - STMicroelectronics STM32MP157F Datasheet HTML 203Page - STMicroelectronics STM32MP157F Datasheet HTML 204Page - STMicroelectronics STM32MP157F Datasheet HTML 205Page - STMicroelectronics STM32MP157F Datasheet HTML 206Page - STMicroelectronics STM32MP157F Datasheet HTML 207Page - STMicroelectronics STM32MP157F Datasheet HTML 208Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 204 / 260 page
background image
Electrical characteristics
STM32MP157C/F
204/260
DS12505 Rev 5
General PCB design guidelines
PCB design guidelines are provided in AN5031 “Getting started with STM32MP1 Series
hardware development.” available from the ST website www.st.com.
6.3.23
DAC electrical characteristics
Table 80. DAC characteristics(1)(2)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDDA
Analog supply voltage
-
1.8
3.3
3.6
V
VREF+
Positive reference voltage
-
1.80
-
VDDA
VREF-
Negative reference
voltage
--
VSSA
-
RL
Resistive Load
DAC output
buffer ON, Not
valid in Sample
& Hold mode
connected to
VSSA
5-
-
kΩ
connected to
VDDA
25
-
-
RO
Output Impedance
DAC output buffer OFF
10.3
13
16
RBON
Output impedance sample
and hold mode, output
buffer ON
DAC output
buffer ON
VDD = 2.7 V
-
-
1.6
kΩ
VDD = 2.0 V
-
-
2.6
RBOFF
Output impedance sample
and hold mode, output
buffer OFF
DAC output
buffer OFF
VDD = 2.7 V
-
-
17.8
kΩ
VDD = 2.0 V
-
-
18.7
CL
Capacitive Load
DAC output buffer OFF
-
-
50
pF
CSH
Sample and Hold mode
-
0.1
1
µF
VDAC_OUT
Voltage on DAC_OUT
output
DAC output buffer ON
0.2
-
VDDA
-
0.2(3)
V
DAC output buffer OFF
0
-
VREF
+
tSETTLING
Settling time (full scale: for
a 12-bit code transition
between the lowest and
the highest input codes
when DAC_OUT reaches
the final value of ±1LSB)
Normal mode,
DAC output
buffer ON
±1 LSB
-
2
-
µs
Normal mode,
DAC output buffer OFF,
+/-1LSB, Cload 10 pF
--
2
tWAKEUP(4)
Wakeup time from off
state (setting the Enx bit in
the DAC Control register)
until the ±1LSB final value
Normal mode,
DAC output buffer ON
-5
7.5
µs
Normal mode,
DAC output buffer OFF
-2
5
PSRR
VDDA supply rejection ratio
Normal mode
DAC output buffer ON
--80
-28
dB



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com