AM652X datasheet(226/277 Pages) TI1

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CLOCKOUT

DATAOUT

PRSO1

PRSO2H

PRSO3

SPRSP08_TIMING_PRU_06

PRSO2L

226

AM6548, AM6528, AM6546

AM6526, AM6527

SPRSP08I – NOVEMBER 2017 – REVISED DECEMBER 2019

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Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527

Specifications

Table 5-93. PRU_ICSSG PRU Switching Characteristics - Shift Out Mode (continued)

NO.

PARAMETER

DESCRIPTION

MIN

MAX

UNIT

PRSO2

tw(PRU_CLKOUTL)

Pulse Duration, PRU_CLKOUT Low

-0.3 +

0.475×P×Z

(1)(2)

PRSO3

tw(PRU_CLKOUTH)

Pulse Duration, PRU_CLKOUT High

-0.3 +

0.475×P×Y

(1)(3)

PRSO4

td(PRU_CLKOUT-

PRU_DATAOUT)

Delay time, PRU_CLKOUT to PRU_DATAOUT Valid

-1

(1) P = Software programmable shift out clock period, defined by PRU0_GPO_DIV0 and PRU0_GPO_DIV1 bit fields in the GPCFGn

(2) The Z parameter is defined as follows: If PRU0_GPI_DIV0 and PRU0_GPI_DIV1 are INTEGERS -or- if PRU0_GPI_DIV0 is a NON-

INTEGER and PRU0_GPI_DIV1 is an EVEN INTEGER then, Z equals (PRU0_GPI_DIV0 × PRU0_GPI_DIV1). If PRU0_GPI_DIV0 is a

NON-INTEGER and PRU0_GPI_DIV1 is an ODD INTEGER then, Z equals (PRU0_GPI_DIV0 × PRU0_GPI_DIV1 + 0.5). If

PRU0_GPI_DIV0 is an INTEGER and PRU0_GPI_DIV1 is a NON-INTEGER then, Z equals (PRU0_GPI_DIV0 × PRU0_GPI_DIV1 + 0.5

× PRU0_GPI_DIV0). If PRU0_GPI_DIV0 and PRU0_GPI_DIV1 are NON-INTEGERS then, Z equals (PRU0_GPI_DIV0 ×

PRU0_GPI_DIV1 + 0.25 × PRU0_GPI_DIV0).

(3) The Y parameter is defined as follows: If PRU0_GPI_DIV0 and PRU0_GPI_DIV1 are INTEGERS -or- if PRU0_GPI_DIV0 is a NON-

INTEGER and PRU0_GPI_DIV1 is an EVEN INTEGER then, Y equals (PRU0_GPI_DIV0 × PRU0_GPI_DIV1). If PRU0_GPI_DIV0 is a

NON-INTEGER and PRU0_GPI_DIV1 is an ODD INTEGER then, Y equals (PRU0_GPI_DIV0 × PRU0_GPI_DIV1 - 0.5). If

PRU0_GPI_DIV0 is an INTEGER and PRU0_GPI_DIV1 is a NON-INTEGER then, Y equals (PRU0_GPI_DIV0 × PRU0_GPI_DIV1 - 0.5

× PRU0_GPI_DIV0). If PRU0_GPI_DIV0 and PRU0_GPI_DIV1 are NON-INTEGERS then, Y1 equals (PRU0_GPI_DIV0 ×

PRU0_GPI_DIV1 - 0.25 × PRU0_GPI_DIV0) and Y2 equals (PRU0_GPI_DIV0 × PRU0_GPI_DIV1 + 0.25 × PRU0_GPI_DIV0), where

Y1 is the first high pulse and Y2 is the second high pulse.

Figure 5-98. PRU_ICSSG PRU Shift Out Timing

5.9.5.21.1.4

PRU_ICSSG PRU Sigma Delta and Peripheral Interface Modes Electrical Data and Timing

Table 5-94. PRU_ICSSG PRU Timing Requirements - Sigma Delta Mode

NO.

PARAMETER

DESCRIPTION

MIN

MAX

UNIT

PRSD1

tc(SD_CLK)

Cycle time, SD_CLK

PRSD2L

tw(SD_CLKL)

Pulse Duration, SD_CLK Low

PRSD2H

tw(SD_CLKH)

Pulse Duration, SD_CLK High

PRSD3

tsu(SD_DATA-SD_CLK)

Setup time, SD_DATA valid before SD_CLK active edge

PRSD4

th(SD_CLK-SD_DATA)

Hold time, SD_DATA valid before SD_CLK active edge

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