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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32MP151C датащи(PDF) 209 Page - STMicroelectronics |
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STM32MP151C датащи(HTML) 209 Page - STMicroelectronics |
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209 / 253 page  DS12501 Rev 3 209/253 STM32MP151C/F Electrical characteristics 232 6.3.34 LCD-TFT controller (LTDC) characteristics Unless otherwise specified, the parameters given in Table 92 for LCD-TFT are derived from tests performed under the ambient temperature, Fpclk4 frequency and VDD supply voltage summarized in Table 13: General operating conditions, with the following configuration: • LCD_CLK polarity: high • LCD_DE polarity: low • LCD_VSYNC and LCD_HSYNC polarity: high • Pixel formats: 24 bits • Output speed is set to OSPEEDRy[1:0] = 11 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5×VDD • I/O compensation cell enabled Table 92. LTDC characteristics (1) Symbol Parameter Conditions Min Max Unit fCLK LTDC clock output frequency 2.7 V < VDD < 3.6 V OSPEEDR[1:0] = 11, 10 -90 MHz 1.71 V < VDD < 3.6 V OSPEEDR[1:0] = 11 -45 1.71 V < VDD < 3.6 V OSPEEDR[1:0] = 10 -38 DCLK LTDC clock output duty cycle - 45 55 % tw(CLKH), tw(CLKL) Clock High time, low time - tw(CLK)/2 - 0.5 tw(CLK)/2 + 0.5 ns tv(DATA) Data output valid time OSPEEDR[1:0] = 11 - 3 OSPEEDR[1:0] = 10 - 4 th(DATA) Data output hold time - 0 - tv(HSYNC), tv(VSYNC), tv(DE) HSYNC/VSYNC/DE output valid time OSPEEDR[1:0] = 11 - 2.5 OSPEEDR[1:0] = 10 - 3.5 th(HSYNC), th(VSYNC), th(DE) HSYNC/VSYNC/DE output hold time - 0 - 1. Guaranteed by characterization results. |
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