AR8327-AL1A-R datasheet(358/394 Pages) ETC2

358 / 394 page

358 • AR8327/AR8327N Seven-port Gigabit Ethernet Switch

Atheros Communications, Inc.

358 • June 2011

COMPANY CONFIDENTIAL

3.10.15 Function Control Register

Address Offset: 0x10, or 0d16

Table 3-380, “Function Control Register,” on page 358 summarizes the Register

Table 3-380.

Function Control Register

1000BASE-T

Full-Duplex

Mode

PHY able to perform 1000BASE-T Full Duplex

HW Rst

Always 1

SW Rst

Always 1

1000BASE-T

Half-Duplex

Mode

PHY not able to perform 1000BASE-T Half Duplex

HW Rst

Always 0

SW Rst

Always 0

11:0

Reserved

Mode

HW Rst

Always 0

SW Rst

Always 0

Bit

Symbol

Type

Description

Bit

Symbol

Type

Description

15:12

Reserved

Mode

Always 0

HW Rst

SW Rst

Assert CRS on

Transmit

Mode

R/W

This bit has effect only in 10Base-T half-duplex mode:

1 = assert on transmitting or receiving

0 = assert on reveiving. Do NOT assert on transmitting

HW Rst

SW Rst

Retain

Reserved

Mode

Always 0

HW Rst

SW Rst

9:8

Reserved

Mode

R/O

Always 0

HW Rst

SW Rst

6:5

MDI Crossover

Mode

R/W

Changes to these bits are disruptive to the normal

operation; therefore any changes to these registers must

be followed by a software reset to take effect.

00 = Manual MDI configuration

01 = Manual MDIX configuration

10 = Reserved

11 = Enable automatic crossover for all modes

HW Rst

SW Rst

Updage

4:3

Reserved

Mode

Always 0

HW Rst

SW Rst

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