PIC18F4520ESLASHMLQTP datasheet(113/390 Pages) MICROCHIP

113 / 390 page

 2004 Microchip Technology Inc.

Preliminary

DS39631A-page 111

PIC18F2420/2520/4420/4520

10.3

PORTC, TRISC and LATC

Registers

PORTC is an 8-bit wide, bidirectional port. The corre-

sponding data direction register is TRISC. Setting a

TRISC bit (= 1) will make the corresponding PORTC

pin an input (i.e., put the corresponding output driver in

a high-impedance mode). Clearing a TRISC bit (= 0)

will make the corresponding PORTC pin an output (i.e.,

put the contents of the output latch on the selected pin).

The Data Latch register (LATC) is also memory

mapped. Read-modify-write operations on the LATC

PORTC.

PORTC is multiplexed with several peripheral functions

(Table 10-5). The pins have Schmitt Trigger input buff-

ers. RC1 is normally configured by configuration bit,

CCP2MX, as the default peripheral pin of the CCP2

module (default/erased state, CCP2MX = 1).

When enabling peripheral functions, care should be

taken in defining TRIS bits for each PORTC pin. Some

peripherals override the TRIS bit to make a pin an output,

while other peripherals override the TRIS bit to make a

pin an input. The user should refer to the corresponding

peripheral section for additional information.

The contents of the TRISC register are affected by

peripheral overrides. Reading TRISC always returns

the current contents, even though a peripheral device

may be overriding one or more of the pins.

EXAMPLE 10-3:

INITIALIZING PORTC

Note:

On a Power-on Reset, these pins are

configured as digital inputs.

CLRF

PORTC

; Initialize PORTC by

; clearing output

; data latches

CLRF

LATC

; Alternate method

; to clear output

; data latches

MOVLW

0CFh

; Value used to

; initialize data

; direction

MOVWF

TRISC

; Set RC<3:0> as inputs

; RC<5:4> as outputs

; RC<7:6> as inputs

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