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MB91F583ASH датащи(PDF) 156 Page - Cypress Semiconductor |
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MB91F583ASH датащи(HTML) 156 Page - Cypress Semiconductor |
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156 / 176 page ![]() Document Number: 002-04665 Rev *A Page 155 of 175 MB91580M/S Series UART (Async Serial Interface) timing (SMR:MD2-0="000"b, "001"b) When the external clock is selected (BGR:EXT=1) (TA: Recommended operating conditions, VCC =5.0V±10%, VSS=AVSS=0.0V) Parameter Symbol Pin name Conditions Value Unit Remarks Min Max Serial clock "L" pulse width tSLSH SCK0_0, SCK0_1 *, SCK1, SCK2 *, SCK3 * CL=50pF tCPP+10 - ns Serial clock "H" pulse width tSHSL tCPP+10 - ns SCK fall time tF - 5 ns SCK rise time tR - 5 ns *: Only available with MB91F583AM/F584AM/F585AM SCK tSHSL VIL VIH VIH tR tSLSH tF VIL VIH VIL When the external clock is selected LIN interface (v2.1)( LIN Communication Control Interface (v2.1)) timing (SMR:MD2-0="011"b) When the external clock is selected (BGR:EXT=1) (TA: Recommended operating conditions, VCC =5.0V±10%, VSS=AVSS=0.0V) Parameter Symbol Pin name Conditions Value Unit Remarks Min Max Serial clock "L" pulse width tSLSH SCK0_0, SCK0_1 *, SCK1, SCK2 *, SCK3 * CL=50pF tCPP+10 - ns Serial clock "H" pulse width tSHSL tCPP+10 - ns SCK fall time tF - 5 ns SCK rise time tR - 5 ns *: Only available with MB91F583AM/F584AM/F585AM SCK tSHSL VIL VIH VIH tR tSLSH tF VIL VIH VIL When the external clock is selected |
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