L9678P datasheet(185/203 Pages) STMICROELECTRONICS

185 / 203 page

DocID029274 Rev 3

185/203

L9678P, L9678P-S

Electrical characteristics

202

15.17.3

High/low side FET test

All electrical characteristics are valid for the following conditions unless otherwise noted.

-40 °C

 Ta  +95 °C, VINGOOD1(max)  VIN  35 V, 6 V  SSxy  35 V, 7V  VRESDIAG 

35V.

15.17.4

Deployment timer test

All electrical characteristics are valid for the following conditions unless otherwise noted.

-40 °C

 Ta  +95 °C, VINGOOD1(max)  VIN  35 V

Table 50. High/low side FET test

N°

Symbol

Parameter

Condition

Min

Typ

Max

Unit

1IHS_FET_TH

Detection threshold

(HS FET test)

-10%

1.8

+10%

2ILS_FET_TH

Detection threshold low

side FET test

-10%

450

+10%

µA

3EFET_TESt

Energy transferred to

squib during HS/LS FET

tests

Design Info

170

µJ

TFLT_HS_FET_TH

TFLT_LS_FET_TH

FET Test deglitch filter

time

-1.3

1.5

1.7

µs

TFETTIMEOUT

HS/LS FET test time-out

190

200

210

µs

6SGxy_OPEN

Squib open ground

detection

GNDSUBx as ground

reference

300

450

600

7TFLT_SGOPEN

Squib open ground

detection filter time

-46

µs

Table 51. Deployment timer test

Symbol

Parameter

Comments / Conditions

Min

Typ

Max

Unit

1tPULSE_IDLE

Deployment timer pulse

Test Idle Time

SYSDIAGREQ(DSTEST)=PULSE

2IPULSE_HIGH_00

Deployment timer pulse

Test High Time

SYSDIAGREQ(DSTEST)=PULSE

DCR_x(Deploy_Time) = 00

-5%

+5%

µs

3IPULSE_HIGH_01

SYSDIAGREQ(DSTEST)=PULSE

DCR_x(Deploy_Time) = 01

-5%

584

+5%

µs

4IPULSE_HIGH_10

SYSDIAGREQ(DSTEST)=PULSE

DCR_x(Deploy_Time) = 10

-5%

792

+5%

µs

5IPULSE_HIGH_11

SYSDIAGREQ(DSTEST)=PULSE

DCR_x(Deploy_Time) = 11

-5%

2160

+5%

µs

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