L9678P datasheet(146/203 Pages) STMICROELECTRONICS

146 / 203 page

Safing logic

L9678P, L9678P-S

146/203

DocID029274 Rev 3

Each safing record has SPI accessible registers defined in the SPI command tables and

summarized below:



Request Mask and Request Target - to understand what sensor the microcontroller is

addressing



Response Mask and Response Target - to identify the sensor response

–

Data Mask - to extract relevant sensor data from the response. Sensor data is

extracted as a bit-wise AND result of the SAF_DATA_MASKx and monitored

SPI_MISO data

–

The extracted data is then right-justified into a 16-bit register for 16-bit safing

records, respectively, prior to further processing steps which assume data is

signed - two-s complement represented



Safing Threshold - specific value that sets the comparator limit for successful arming



Control:

–

IF, In Frame - to indicate serial data response is "in frame". There are two types of

potential serial data responses, "in-frame" and "out of frame"

–

CS - to align safing record with a specific SPI CS. The device contains 2 SPI CS

inputs for the safing function (SAF_CS0 and SAF_CS1)

–

ARM - there are two internal arming signals, each active record is assigned or

mapped to any arming signal. Several safing records can be mapped to a single

arming output

–

Dwell - Once an arming condition is detected, the safing record remains armed for

the specified dwell time

–

Comb (Combined Data) - specific solution for dual axis high-g sensors specifically

oriented off-axis

–

Lim En (Limit Enable) - to enable PSI5 out-of-range control

–

Lim Sel (Limit Select) - to select PSI5 out-of-range thresholds between 8-bit and

10-bit protocol

–

SPIFLDSEL (Spi Field Select) â€“ to determine which 16-bit field in long SPI

messages (>31 bit) to use for response on MISO of SPI monitor. If the

SPIFLDSEL bit is set to 0 the message bits from 0 (first bit received) to 15 are

processed, while if set to 1 the message bits from 16 to 31 are processed.

SPIFLDSEL bit will not help L9678P device to work with sensor that places data

across this boundary or has response and data in separate 'fields'.



In case of message less than 32-bit, always the first 16bits received will be

processed regardless of the SPIFLDSEL value.

If input packet matches multiple safing records, the safing engine should process all of them

and treat them independently.

Safing record can only be evaluated on the first matching input packet. Any further data

packet matches are ignored (i.e. once CC is set, record can't be processed until is cleared).

The En (Record Enable) bit for any record is programmable as on or off at any time and will

enable/disable the record itself upon the following sensor sampling period.

All CC bits are available in one register (SAF_CC) for access in one single SPI read.

Safing Engine must not process sensor data in any state but Safing state (refer to Figure 9).

All safing records are cleared on SSM RESET.

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