AT89C5131A-RDTIM datasheet(157/184 Pages) ATMEL

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AT89C5130A/31A-M

4337C–USB–02/05

Table 112. WDTPRG Register

WDTPRG - Watchdog Timer Out Register (0A7h)

Reset value = XXXX X000

WDT During Power-down

and Idle

In Power-down mode the oscillator stops, which means the WDT also stops. While in

Power-down mode the user does not need to service the WDT. There are 2 methods of

exiting Power-down mode: by a hardware reset or via a level activated external interrupt

which is enabled prior to entering Power-down mode. When Power-down is exited with

hardware reset, servicing the WDT should occur as it normally should whenever the

AT89C5130A/31A-M is reset. Exiting Power-down with an interrupt is significantly differ-

ent. The interrupt is held low long enough for the oscillator to stabilize. When the

interrupt is brought high, the interrupt is serviced. To prevent the WDT from resetting the

device while the interrupt pin is held low, the WDT is not started until the interrupt is

pulled high. It is suggested that the WDT be reset during the interrupt service routine.

To ensure that the WDT does not overflow within a few states of exiting of power-down,

it is better to reset the WDT just before entering power-down.

In the Idle mode, the oscillator continues to run. To prevent the WDT from resetting the

AT89C5130A/31A-M while in Idle mode, the user should always set up a timer that will

periodically exit Idle, service the WDT, and re-enter Idle mode.

Bit

Number

Bit

Mnemonic

Description

Reserved

The value read from this bit is undetermined. Do not try to set this bit.

WDT Time-out select bit 2

WDT Time-out select bit 1

WDT Time-out select bit 0

S2 S1 S0 Selected Time-out

16384x2^(214 - 1) machine cycles, 16.3 ms at FOSC = 12 MHz

16384x2^(215 - 1) machine cycles, 32.7 ms at FOSC = 12 MHz

16384x2^(216 - 1) machine cycles, 65.5 ms at FOSC = 12 MHz

16384x2^(217 - 1) machine cycles, 131 ms at FOSC = 12 MHz

16384x2^(218 - 1) machine cycles, 262 ms at FOSC = 12 MHz

16384x2^(219 - 1) machine cycles, 542 ms at FOSC = 12 MHz

16384x2^(220 - 1) machine cycles, 1.05 s at FOSC = 12 MHz

16384x2^(221 - 1) machine cycles, 2.09 s at FOSC = 12 MHz

16384x2^S machine cycles

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